The ESP32-C3 is Espressif's RISC-V single-core SoC with a 2.4 GHz radio — Wi-Fi and Bluetooth Low Energy — integrated in the chip. In MCUID's hardware chain — chip → module → board — this page describes what the chip provides; pins, connectors and flash packaging are decided by the module and the board. The capability rows below cite what the official board guide states about the chip; datasheet-level detail (frequency grades, peripheral list) is linked, not restated.
Start from a board: ESP32-C3-DevKitM-1 — the board this site documents for the chip; related Q&A: C3 mini vs XIAO ESP32C3. Official entry: ESP-IDF Get Started.
- Wireless — complete Wi-Fi and Bluetooth Low Energy functions on chip.
- Strapping pins — GPIO2, GPIO8, GPIO9 select chip functions at power-up/reset.
- Flash — optional, integrated inside the chip package, up to 8 MB (ESP32-C3 datasheet v2.5). The DevKitM-1's MINI-1/-1U modules ship 4 MB (N4X/H4X), so that board carries no separate flash chip.
Capabilities — what the chip provides
Each row is one capability: the official wording, what it means in development, and the source.
Capabilities
| Capability | What the sources say | Source |
|---|---|---|
| Wi-Fi + Bluetooth Low Energy on chip | 'This board integrates complete Wi-Fi and Bluetooth® Low Energy functions.' (official wording) Board guide wording; radio detail (802.11 version) belongs to the ESP32-C3 datasheet, not asserted here. | ESP32-C3-DevKitM-1 User Guide (latest revision; guide states 'No previous versions available') · docs/en/esp32-c3-devkitm-1/user_guide.rst#description-of-components |
| Strapping pins GPIO2/GPIO8/GPIO9 | 'GPIO2, GPIO8, and GPIO9 are strapping pins of the ESP32-C3 series of chips.' (official wording) Guide footnote points to the ESP32-C3 datasheet 'Boot Configuration' section for behavior. | ESP32-C3-DevKitM-1 User Guide (latest revision; guide states 'No previous versions available') · docs/en/esp32-c3-devkitm-1/user_guide.rst#header-block |
| 4 MB flash integrated in the chip package | Optional flash in the chip's package, up to 8 MB (datasheet v2.5 overview). Ordering table: ESP32-C3 (no flash), ESP32-C3FN4 (EOL, 4 MB), ESP32-C3FH4 (4 MB), ESP32-C3FH4AZ (NRND, 4 MB). The DevKitM-1 guide's 'flash of 4 MB integrated inside the chip's package' wording describes the ESP32-C3-MINI-1 module mounted on that board (4 MB N4X/H4X SKUs), not a chip-level 4 MB limit. | ESP32-C3 Series Datasheet v2.5 · esp32-c3_datasheet_en.html |
Before you rely on a capability — scope and limits
- Chip capability is not header availability. Which pins reach a header is module and board wiring; on the DevKitM-1, GPIO2/8/9 all reach the J1/J3 headers (GPIO8 drives the on-board RGB LED).
- Strapping pins are shared with normal use. GPIO2/8/9 work as ordinary GPIO after boot, but external circuitry that holds them at unexpected levels during power-up or reset can change boot behavior — see the ESP32-C3 datasheet's Boot Configuration section.
- Radio detail belongs to the datasheet. The board guide's wording ("complete Wi-Fi and BLE") is what this page asserts; 802.11 revision and BLE version are datasheet facts, not added here.
Modules and boards built on the ESP32-C3
Modules using this chip
Boards using this chip
Start developing
- ESP-IDF (official SDK) — the ESP-IDF Get Started flow installs the toolchain and walks through the first project; the DevKitM-1 guide points there.
- Board in hand but not sure it is the official one? Read the board page's identification notes first — many third-party C3 compact boards share the chip but not this pinout.
Common questions this site answers
Sources and evidence
- Chip capabilities — the table cites the official ESP32-C3-DevKitM-1 user guide (latest snapshot 2026-11-14): description and header-block strapping footnote.
- Boot behavior of strapping pins — the guide footnote refers to the ESP32-C3 datasheet Boot Configuration section; MCUID links the datasheet entry point via the Espressif ESP32-C3 documentation index.