NUCLEO-G071RB vs NUCLEO-F401RE — same Nucleo-64 body, two MCUs, and one connector trap
Both are NUCLEO-64 boards with on-board ST-LINK/V2-1 and Morpho headers CN7/CN10. The G071RB carries a Cortex-M0+ at up to 64 MHz (36 KB SRAM / 128 KB flash), the F401RE an STM32F401RET6 with 512 KB flash. Beware: CN4 means different things in the two manuals. Verified facts only, with sources.
Question this page answers: "NUCLEO-G071RB or NUCLEO-F401RE — what actually differs, and what is identical?"
What is identical
Both boards are ST NUCLEO-64 evaluation boards with:
- an on-board ST-LINK/V2-1 debugger (SWD only for STM32 devices), powered over its own USB connector;
- dual-row ST morpho extension connectors CN7 and CN10 (2x19 pins each), accessible from both board sides;
- the standard Nucleo power options (ST-LINK USB, VIN, E5V, 3.3 V).
What differs
| NUCLEO-G071RB | NUCLEO-F401RE | Source | |
|---|---|---|---|
| Main MCU | STM32G071RB: Arm Cortex-M0+ 32-bit RISC core, up to 64 MHz; 36 Kbytes SRAM, up to 128 Kbytes flash | STM32F401RET6 in LQFP64: Arm Cortex-M4 up to 84 MHz, 512 Kbytes flash (ordering-code letter E); silicon revision Z or 1 | STM32G071RB datasheet (DS12232 Rev 5); UM1724 Table 2 + product history |
| Board manual / PCB family | MB1360, user manual UM2324 | MB1136, user manual UM1724 | both manuals |
| Debug connector naming | CN4 = ST-LINK jumper area (two jumpers: ON = debug the on-board MCU, OFF = drive an external target); external SWD goes to CN11, a physically 6-pin debug connector (VDD_TARGET, SWCLK, GND, SWDIO, NRST, plus a 6th SWO/reserved position — the mirror of the F401RE's CN4; SB19 must be OFF if pin 5 is used) | CN4 = a 6-pin SWD debug header (VDD_TARGET, SWCLK, GND, SWDIO, NRST, SWO reserved), wired to the on-board ST-LINK/V2-1 | UM2324 §6.4.3-6.4.4 + Table 6; UM1724 Table 5 |
| Toolchain | manuals list IAR Embedded Workbench, Keil MDK-ARM and STM32CubeIDE; libraries via the STM32Cube MCU Package | same ecosystem, same STM32Cube MCU Package wording | UM2324 §2/§3; UM1724 feature list |
The connector trap: the number CN4 does not mean the same thing on the two boards. On MB1360 (G071RB) CN4 is the two-jumper isolation area and external SWD uses CN11; on MB1136 (F401RE) CN4 is itself the 6-pin SWD header. Reading one manual's connector numbers onto the other board miswires the debug chain — always follow the manual for your PCB family.
No specific IDE or device-package version numbers are pinned in the sources cited here; use the current ST tool versions (STM32CubeIDE / STM32CubeProgrammer) as published by ST.
Morpho coverage note
This site's NUCLEO-G071RB record now carries the full 76-contact morpho mapping (CN7 + CN10, 38 each) on the NUCLEO-G071RB board page. UM2324 does publish the morpho table only as a vector figure (no text layer), so the mapping was verified from three sources instead: the board-specific MB1360-G071RB-C02 schematic (page-5 text layer) as the adjudicating source, the Zephyr RTOS `st_morpho_connector.dtsi` gpio-map (fixed commit, all 59 GPIO entries) as a full cross-check, and UM2324 Rev 5 (Table 13 labels, Table 10 solder-bridge defaults) for functions. Where the two manuals' boards differ at the same morpho position (for example CN7-25/27, where G071RB keeps PC14/PC15 behind default-OFF SB23/SB24), the C02 schematic of the G071RB revision decides, per this site's adjudication rule. All 59 GPIO positions agree across C02 and Zephyr with zero conflicts; the NUCLEO-F401RE board page keeps its own UM1724-sourced tables.
What this page cannot tell you
- F401RE core architecture details beyond the board-manual facts above (clock tree, core generation): not covered by the admitted sources, which stop at the ordering-code scheme and assembled part.
- Benchmark or power comparisons between Cortex-M0+ and the F401RE — not asserted.
Sources
- UM2324: STM32 Nucleo-64 boards (MB1360) user manual, Rev 5 — CN4 jumper area, CN11 physically 6-pin SWD (Table 6: 5 signals + SWO/reserved pin 6), morpho CN7/CN10, IDE list.
- STM32G071RB datasheet (DS12232 Rev 5, 143 pages) — Cortex-M0+ up to 64 MHz, 36 KB SRAM, up to 128 KB flash.
- UM1724: STM32 Nucleo-64 boards (MB1136) user manual, Rev 17 — CN4 6-pin SWD (Table 5), STM32F401RET6, ordering-code table (E = 512 Kbytes), STM32Cube MCU Package.