STMicroelectronics NUCLEO-G071RB board record (MB1360): STM32G071RB Cortex-M0+ at up to 64 MHz with 128 KB flash / 36 KB SRAM, Arduino Uno V3 headers CN5/CN6/CN8/CN9, 2x19-pin ST morpho connectors CN7/CN10, ST-LINK SWD jumper area CN4 and the physically 6-pin SWD connector CN11 (5 signals + reserved SWO). All 118 contacts mapped with the C02 schematic as adjudicating source.
ST morpho connector, 2x19 pins: odd pins form one row, even pins the other, both accessible from top and bottom (UM2324 Section 7.3: all signals and power pins except VDD_CORE 1.2 V are available on the morpho connectors). Pin-by-pin mapping adjudicated from the C02 schematic page-5 text layer (pin numbers PICN7nn/PICN10nn paired with net labels NL* and solder pads COSBn by coordinate alignment), cross-checked against all 59 Zephyr st_morpho_connector.dtsi gpio-map entries at commit 7cd4b562 (26 CN7 + 33 CN10) and UM2324 Rev 5 Table 13 signal labels. Zero conflicts between C02 and Zephyr. UM2324 Figure 17 publishes the morpho table only as a vector figure (no text layer), so it corroborates structure but not individual labels. Power pins carry no net label in the C02 text layer; CN7-6 E5V and CN7-24 VIN are anchored by UM2324 Section 6.5/Figure 10 prose. CN7-33 is unlabeled in C02 and absent from Zephyr: recorded NC (the F401RE same-position VBAT hint is not a MB1360 source). · Source: MB1360-G071RB-C02 schematic (NUCLEO-G071RB board revision C02) · C02 schematic page 5 (left morpho); UM2324 Rev 5 Table 13; Zephyr st_morpho_connector.dtsi
A4 via SB4 (ON) on PB11; SB2=ON reroutes to PB9 — per C02 p5 + chip definition PB9 is the default I2C SDA (D14); UM2324 Table 12 alt naming recorded as a conflict
A5 via SB3 (ON) on PB12; SB5=ON reroutes to PB8 — per C02 p5 + chip definition PB8 is the default I2C SCL (D15); UM2324 Table 12 alt naming recorded as a conflict
ST-LINK/V2-1 part SWD routing jumper header (4 pins, two jumpers). Table 5 defines it as T_SWCLK/T_SWDIO: jumpers [1-2] and [3-4] default ON = ST-LINK programs the on-board MCU; both OFF = ST-LINK drives an external target through CN11 (Section 6.4.4, Figure 8). Per-pin signal names are not published in UM2324 Rev 5 and carry no net label in the C02 text layer, so contacts list no gpio mapping; the [1-2]=T_SWCLK, [3-4]=T_SWDIO pairing follows the Table 5 column order. · Source: UM2324: STM32 Nucleo-64 boards (MB1360) user manual, Rev 5 · Table 5: ST-LINK jumper configuration; Section 6.4.4
Arduino Uno V3 analog header (Table 12). A4/A5 carry the SB2-SB5 solder-bridge choice: default SB4/SB3 ON routes A4 to PB11 and A5 to PB12 (ADC-capable, Table 10 bold 'CN8 PIN5/6 works as ADC'); SB2 ON reroutes A4 to PB9, SB5 ON reroutes A5 to PB8 (per C02 p5 + chip definition PB9 = default I2C SDA (Arduino D14), PB8 = default I2C SCL (D15); UM2324 Table 12 alt naming registered as a conflict; no ADC channel on either pin on G071RB). Same choice appears on CN7-36/38. · Source: UM2324: STM32 Nucleo-64 boards (MB1360) user manual, Rev 5 · Table 12: ARDUINO connector pinout
A4 via SB4 (ON) on PB11; SB2=ON reroutes to PB9 — per C02 p5 + chip definition PB9 is the default I2C SDA (D14); UM2324 Table 12 alt naming recorded as a conflict
A5 via SB3 (ON) on PB12; SB5=ON reroutes to PB8 — per C02 p5 + chip definition PB8 is the default I2C SCL (D15); UM2324 Table 12 alt naming recorded as a conflict
The NUCLEO-G071RB is STMicroelectronics' NUCLEO-64 evaluation board for the STM32G071RB: an Arm Cortex-M0+ core at up to 64 MHz with 128 KB flash and 36 KB SRAM in an LQFP64 package, soldered directly on the MB1360 PCB. The board carries the four Arduino Uno V3 headers (CN6 power, CN8 analog, CN5 and CN9 digital), the dual-row ST morpho connectors CN7/CN10 (2x19 pins each, accessible from both board sides), the on-board ST-LINK/V2-1 debugger, its CN4 SWD-routing jumper area, and the CN11 SWD connector for external targets — physically 6 pins (VDD_TARGET, SWCLK, GND, SWDIO, NRST, and a 6th SWO/reserved position per UM2324 Table 6). This page renders the MCUID data record: 118 contacts across eight connectors, the solder-bridge defaults, and every published field with its fixed source. The ST-LINK USB connector CN2 is a power/debug interface, not an expansion header, so it stays out of the contact table — its 5 V_ST_LINK rail is distinct from CN10-8's 5V_USB_CHG.
How the 76 morpho contacts were verified
UM2324 publishes the morpho pin table only as a vector figure (no text layer), so this record was built from three sources instead: the board-specific C02 schematic (page-5 text layer, pin numbers paired with net labels by coordinate alignment) as the adjudicating source, the Zephyr RTOS `st_morpho_connector.dtsi` gpio-map (all 59 GPIO entries, 26 on CN7 + 33 on CN10, at a fixed commit) as a full cross-check, and UM2324 Rev 5 (Table 13 signal labels, Table 10 solder bridges, power-supply prose) for functions and defaults. The three sources agree on every one of the 59 GPIO positions — zero conflicts; where the schematic's label column alignment was ambiguous, the Zephyr map plus Table 13's Arduino labels settled the pairing.
Start developing
Chip facts — the STM32G071RB chip page separates what the chip provides from what this board wires up.
The STM32G071RB is soldered directly on the board — there is no module layer, and the compatible-modules list is intentionally empty.
The connector system at a glance
CN6 / CN8 / CN5 / CN9 are the four Arduino Uno V3 single-row headers (power, analog, digital 1-10, digital 1-8). An Uno R3 shield plugs onto these.
CN7 (male) and CN10 (female) are the ST morpho connectors: each 2x19 pins, odd pins one row, even pins the other, both accessible from top and bottom. Every Arduino signal appears here, plus Arduino-less signals such as PC9-PC12, PD0-PD9, PF0/PF1, PB10/PB13/PB15 and PA12.
CN4 is not a debug header on this board: it is the ST-LINK part's two-jumper SWD routing area (default ON = debug the on-board MCU; remove both jumpers to drive an external target). External SWD wiring goes to CN11, the debug connector — physically 6 pins (VDD_TARGET, SWCLK, GND, SWDIO, NRST, plus a 6th SWO/reserved position; NRST on pin 5 requires SB19 OFF for external-debug use).
Solder bridges that change the pinout
A4/A5 choice: with the default SB3/SB4 ON, SB2/SB5 OFF, Arduino A4/A5 (and CN7-36/38) sit on PB11/PB12, which carry ADC channels IN15/IN16. Moving the bridges reroutes A4 to PB9 (SB2 ON) and A5 to PB8 (SB5 ON) — per C02 p5 (A4/CN8-5/CN7-36 = PB11 default via SB4, PB9 via SB2; A5/CN8-6/CN7-38 = PB12 default via SB3, PB8 via SB5). Naming follows the C02 schematic plus the chip definition — PB9 is the default I2C SDA (Arduino D14) and PB8 the default I2C SCL (D15) — while UM2324 Table 12 lists the alternate names the other way round; this record adopts the C02/chip wording and registers Table 12 as a conflict (no ADC channel on either pin on this chip).
LSE vs morpho: SB23/SB24 default OFF keeps PC14/PC15 on the 32.768 kHz crystal, so CN7-25/27 do not reach PC14/PC15 as shipped; closing SB23/SB24 (and removing R31/R32) frees them as GPIOs on the morpho header.
HSE: SB25/SB27 default ON (R33/R34 unmounted) leaves PF0/PF1 as GPIOs on CN7-29/31.
USART2 vs ST-LINK VCP: PA2/PA3 (CN10-34/6) are wired straight to the morpho pins; with the default SB16/SB18 ON the ST-LINK virtual COM port additionally shares the same lines — the headers stay connected, the VCP is an extra load on them.
AREF: SB21 default OFF — the Arduino AREF pin (CN5-8) is not connected to AVDD as shipped.
LD4 / B1: the user LED LD4 is driven by PA5 (SB22 default ON, same line as D13/SCK); the user button B1 sits on PC13 (CN7-23).
Which board revision do I have?
The PCB revision is printed as MB1360-G071RB-C0x. This record was adjudicated against the C02 schematic pack published by ST; connector mappings on this page all trace to that revision. If your board carries a different revision letter, treat the morpho GPIO map as unchanged only after checking ST's schematic pack for that revision.
Also known as: NUCLEO-G071RB, STM32 Nucleo-64 G071RB, nucleo-g071rb