开发板STMicroelectronics

NUCLEO-G071RB

意法半导体 NUCLEO-G071RB 板卡档案（MB1360）：STM32G071RB Cortex-M0+，最高 64 MHz，128 KB flash / 36 KB SRAM，Arduino Uno V3 排针 CN5/CN6/CN8/CN9，2×19 针 ST morpho 连接器 CN7/CN10，ST-LINK SWD 跳帽区 CN4 与物理 6 针的 SWD 调试口 CN11（5 信号 + SWO 保留位）。118 个触点全部映射，以 C02 原理图为裁决来源。

装配与兼容

主控芯片: STM32G071RB

修订

MB1360-G071RB-C02 — Board revision whose official schematic pack (mb1360-g071rb-c02) was used as the adjudicating source for every connector mapping on this record. · MB1360-G071RB-C02 schematic (NUCLEO-G071RB board revision C02) · Schematic title block (sheet 1)

引脚图

电源 · 地 · GPIO / 信号 · 板载 LED

CN7 (38 针位)

ST morpho connector, 2x19 pins: odd pins form one row, even pins the other, both accessible from top and bottom (UM2324 Section 7.3: all signals and power pins except VDD_CORE 1.2 V are available on the morpho connectors). Pin-by-pin mapping adjudicated from the C02 schematic page-5 text layer (pin numbers PICN7nn/PICN10nn paired with net labels NL* and solder pads COSBn by coordinate alignment), cross-checked against all 59 Zephyr st_morpho_connector.dtsi gpio-map entries at commit 7cd4b562 (26 CN7 + 33 CN10) and UM2324 Rev 5 Table 13 signal labels. Zero conflicts between C02 and Zephyr. UM2324 Figure 17 publishes the morpho table only as a vector figure (no text layer), so it corroborates structure but not individual labels. Power pins carry no net label in the C02 text layer; CN7-6 E5V and CN7-24 VIN are anchored by UM2324 Section 6.5/Figure 10 prose. CN7-33 is unlabeled in C02 and absent from Zephyr: recorded NC (the F401RE same-position VBAT hint is not a MB1360 source). · 来源: MB1360-G071RB-C02 schematic (NUCLEO-G071RB board revision C02) · C02 schematic page 5 (left morpho); UM2324 Rev 5 Table 13; Zephyr st_morpho_connector.dtsi

编号	名称	类型	GPIO	功能
1	PC10	I/O	PC10	-
2	PC11	I/O	PC11	-
3	PC12	I/O	PC12	-
4	PD2	I/O	PD2	-
5	VDD	P		-
6	E5V	P		External 5 V power input
7	PA14	I/O	PA14	SWCLK (PA14-BOOT0)
8	GND	G		-
9	PD0	I/O	PD0	-
10	PD1	I/O	PD1	-
11	PD3	I/O	PD3	-
12	IOREF	P		I/O reference (3.3 V)
13	PA13	I/O	PA13	SWDIO
14	RESET	I		RESET of target MCU (NRST)
15	PD4	I/O	PD4	-
16	+3.3V	P		3.3 V output
17	PA15	I/O	PA15	-
18	+5V	P		5 V output
19	GND	G		-
20	GND	G		-
21	PB7	I/O	PB7	-
22	GND	G		-
23	PC13	I/O	PC13	User button B1
24	VIN	P		7-12 V power input
25	PC14	I/O	PC14	OSC32_IN; on morpho only with SB23=ON and R31 removed (SB23 default OFF)
26	PD5	I/O	PD5	-
27	PC15	I/O	PC15	OSC32_OUT; on morpho only with SB24=ON and R32 removed (SB24 default OFF)
28	PA0	I/O	PA0	ARD_A0_IN0
29	PF0	I/O	PF0	OSC_IN; GPIO when SB25=ON (default ON, R33/R34 OFF)
30	PA1	I/O	PA1	ARD_A1_IN1
31	PF1	I/O	PF1	OSC_OUT; GPIO when SB27=ON (default ON, R33/R34 OFF)
32	PA4	I/O	PA4	ARD_A2_IN4
33	VBAT	P		VBAT; connected to VDD while SB26=ON (default, UM2324 p27)
34	PB1	I/O	PB1	ARD_A3_IN9
35	PC2	I/O	PC2	-
36	PB11 or PB9	I/O	PB11	A4 via SB4 (ON) on PB11; SB2=ON reroutes to PB9 — per C02 p5 + chip definition PB9 is the default I2C SDA (D14); UM2324 Table 12 alt naming recorded as a conflict
37	PC3	I/O	PC3	-
38	PB12 or PB8	I/O	PB12	A5 via SB3 (ON) on PB12; SB5=ON reroutes to PB8 — per C02 p5 + chip definition PB8 is the default I2C SCL (D15); UM2324 Table 12 alt naming recorded as a conflict

CN10 (38 针位)

ST morpho connector, 2x19 pins (see CN7 notes for the joint C02/Zephyr/UM2324 adjudication). Odd pins share nets with the Arduino headers (CN9-1..8, CN5-1..6), so their C02 evidence is the shared net label on the Arduino side; even pins carry pin-side net labels (x633 column). PD8/PD9 (36/38) exist only on G0-series Nucleo-64 boards. · 来源: MB1360-G071RB-C02 schematic (NUCLEO-G071RB board revision C02) · C02 schematic page 5 (right morpho); UM2324 Rev 5 Table 13; Zephyr st_morpho_connector.dtsi

编号	名称	类型	GPIO	功能
1	PC9	I/O	PC9	-
2	PC8	I/O	PC8	-
3	PB8	I/O	PB8	ARD_D15/I2C1_SDA (SB2 path, default OFF)
4	PC6	I/O	PC6	-
5	PB9	I/O	PB9	ARD_D14/I2C1_SCL (SB5 path, default OFF)
6	PA3	I/O	PA3	USART2_RX; wired straight to this Morpho pin — SB18 (ON) additionally lets the ST-LINK VCP share the line
7	AVDD	P		Analog supply via SB21 (default OFF — pad not connected to AVDD by default)
8	5V_USB_CHG	P		5 V USB charging rail (CN10-8); distinct from CN2's 5V_ST_LINK
9	AGND	G		Analog ground; tied to GND via SB31 (default ON)
10	PD6	I/O	PD6	-
11	PA5	I/O	PA5	ARD_D13/SPI1_SCK; drives LD4 while SB22=ON (default ON)
12	PA12	I/O	PA12	-
13	PA6	I/O	PA6	ARD_D12/SPI1_MISO
14	PA11	I/O	PA11	-
15	PA7	I/O	PA7	ARD_D11/SPI1_MOSI/TIM14_CH1
16	PC1	I/O	PC1	-
17	PB0	I/O	PB0	ARD_D10/SPI1_NSS/TIM3_CH3
18	PC0	I/O	PC0	-
19	PC7	I/O	PC7	ARD_D9/TIM3_CH2
20	GND	G		-
21	PA9	I/O	PA9	ARD_D8
22	PB2	I/O	PB2	-
23	PA8	I/O	PA8	ARD_D7
24	PB6	I/O	PB6	-
25	PB14	I/O	PB14	ARD_D6/TIM15_CH1
26	PB15	I/O	PB15	-
27	PB4	I/O	PB4	ARD_D5/TIM3_CH1
28	PB10	I/O	PB10	-
29	PB5	I/O	PB5	ARD_D4
30	PB13	I/O	PB13	-
31	PB3	I/O	PB3	ARD_D3/TIM1_CH2
32	AGND	G		Analog ground; tied to GND while SB31=ON (default ON)
33	PA10	I/O	PA10	ARD_D2
34	PA2	I/O	PA2	USART2_TX; wired straight to this Morpho pin — SB16 (ON) additionally lets the ST-LINK VCP share the line
35	PC4	I/O	PC4	ARD_D1/USART1_TX
36	PD8	I/O	PD8	GPIO while SB29=OFF (default OFF)
37	PC5	I/O	PC5	ARD_D0/USART1_RX
38	PD9	I/O	PD9	GPIO while SB30=OFF (default OFF)

CN4 (4 针位)

ST-LINK/V2-1 part SWD routing jumper header (4 pins, two jumpers). Table 5 defines it as T_SWCLK/T_SWDIO: jumpers [1-2] and [3-4] default ON = ST-LINK programs the on-board MCU; both OFF = ST-LINK drives an external target through CN11 (Section 6.4.4, Figure 8). Per-pin signal names are not published in UM2324 Rev 5 and carry no net label in the C02 text layer, so contacts list no gpio mapping; the [1-2]=T_SWCLK, [3-4]=T_SWDIO pairing follows the Table 5 column order. · 来源: UM2324: STM32 Nucleo-64 boards (MB1360) user manual, Rev 5 · Table 5: ST-LINK jumper configuration; Section 6.4.4

编号	名称	类型	功能
1	-	I/O	ST-LINK SWD routing jumper [1-2] (T_SWCLK pair), default ON
2	-	I/O	ST-LINK SWD routing jumper [1-2] (T_SWCLK pair), default ON
3	-	I/O	ST-LINK SWD routing jumper [3-4] (T_SWDIO pair), default ON
4	-	I/O	ST-LINK SWD routing jumper [3-4] (T_SWDIO pair), default ON

CN11 (6 针位)

6-pin SWD debug connector on the target part (Table 6): five signals (VDD_TARGET, SWCLK, GND, SWDIO, NRST) plus pin 6 SWO/reserved. SB19 must be OFF if CN11 pin 5 (NRST) is used in an external application (Section 6.4.3 note). · 来源: UM2324: STM32 Nucleo-64 boards (MB1360) user manual, Rev 5 · Table 6: CN11 debug connector (SWD)

编号	名称	类型	功能
1	VDD_TARGET	P	VDD from the application
2	SWCLK	I	SWD clock
3	GND	G	Ground
4	SWDIO	I/O	SWD data input/output
5	NRST	I	RESET of target MCU (SB19 must be OFF if used externally)
6	SWO	I	SWO/reserved per UM2324 p16 Table 6 #6 (C02 p7 PICN1106); listed as reserved, not asserted as a supported feature

CN6 (8 针位)

Arduino Uno V3 power header (Table 12). · 来源: UM2324: STM32 Nucleo-64 boards (MB1360) user manual, Rev 5 · Table 12: ARDUINO connector pinout

编号	名称	类型	功能
1	NC	NC	Reserved for test
2	IOREF	P	I/O reference (3.3 V)
3	NRST	I	RESET
4	3V3	P	3.3 V input/output
5	5V	P	5 V output
6	GND	G	-
7	GND	G	-
8	VIN	P	7-12 V power input

CN8 (6 针位)

Arduino Uno V3 analog header (Table 12). A4/A5 carry the SB2-SB5 solder-bridge choice: default SB4/SB3 ON routes A4 to PB11 and A5 to PB12 (ADC-capable, Table 10 bold 'CN8 PIN5/6 works as ADC'); SB2 ON reroutes A4 to PB9, SB5 ON reroutes A5 to PB8 (per C02 p5 + chip definition PB9 = default I2C SDA (Arduino D14), PB8 = default I2C SCL (D15); UM2324 Table 12 alt naming registered as a conflict; no ADC channel on either pin on G071RB). Same choice appears on CN7-36/38. · 来源: UM2324: STM32 Nucleo-64 boards (MB1360) user manual, Rev 5 · Table 12: ARDUINO connector pinout

编号	名称	类型	GPIO	功能
1	A0	I/O	PA0	ARD_A0_IN0
2	A1	I/O	PA1	ARD_A1_IN1
3	A2	I/O	PA4	ARD_A2_IN4
4	A3	I/O	PB1	ARD_A3_IN9
5	A4	I/O	PB11	A4 via SB4 (ON) on PB11; SB2=ON reroutes to PB9 — per C02 p5 + chip definition PB9 is the default I2C SDA (D14); UM2324 Table 12 alt naming recorded as a conflict
6	A5	I/O	PB12	A5 via SB3 (ON) on PB12; SB5=ON reroutes to PB8 — per C02 p5 + chip definition PB8 is the default I2C SCL (D15); UM2324 Table 12 alt naming recorded as a conflict

CN5 (10 针位)

Arduino Uno V3 digital header 1-10 (Table 12). AREF on pin 8 reaches AVDD only with SB21=ON (default OFF, Table 10 bold). · 来源: UM2324: STM32 Nucleo-64 boards (MB1360) user manual, Rev 5 · Table 12: ARDUINO connector pinout

编号	名称	类型	GPIO	功能
1	D8	I/O	PA9	ARD_D8
2	D9/PWM	I/O	PC7	ARD_D9/TIM3_CH2
3	D10/CS	I/O	PB0	ARD_D10/SPI1_NSS/TIM3_CH3
4	D11/MOSI	I/O	PA7	ARD_D11/SPI1_MOSI/TIM14_CH1
5	D12/MISO	I/O	PA6	ARD_D12/SPI1_MISO
6	D13/SCK	I/O	PA5	ARD_D13/SPI1_SCK; also drives LD4 while SB22=ON (default ON)
7	GND	G		-
8	AREF/AVDD	P		AVDD reaches CN5-8 only while SB21=ON (default OFF)
9	SDA/D14	I/O	PB9	ARD_D14/I2C1_SDA
10	SCL/D15	I/O	PB8	ARD_D15/I2C1_SCL

CN9 (8 针位)

Arduino Uno V3 digital header 1-8 (Table 12). D0/D1 default to USART1 on PC4/PC5 (Table 12 note). · 来源: UM2324: STM32 Nucleo-64 boards (MB1360) user manual, Rev 5 · Table 12: ARDUINO connector pinout

编号	名称	类型	GPIO	功能
1	D0/RX	I/O	PC5	ARD_D0/USART1_RX (default USART1 on PC4/PC5)
2	D1/TX	I/O	PC4	ARD_D1/USART1_TX
3	D2	I/O	PA10	ARD_D2
4	D3/PWM	I/O	PB3	ARD_D3/TIM1_CH2
5	D4	I/O	PB5	ARD_D4
6	D5/PWM	I/O	PB4	ARD_D5/TIM3_CH1
7	D6/PWM	I/O	PB14	ARD_D6/TIM15_CH1
8	D7	I/O	PA8	ARD_D7

NUCLEO-G071RB 是意法半导体的 NUCLEO-64 评估板，搭载 STM32G071RB：Arm Cortex-M0+ 内核、最高 64 MHz、128 KB flash 与 36 KB SRAM，LQFP64 封装直接焊在 MB1360 PCB 上。板卡提供四组 Arduino Uno V3 排针（CN6 电源、CN8 模拟、CN5 与 CN9 数字）、双排 ST morpho 连接器 CN7/CN10（各 2×19 针，板两侧均可接入）、板载 ST-LINK/V2-1 调试器及其 CN4 SWD 路由跳帽区，以及供外部目标使用的 CN11 SWD 调试口——物理 6 针（VDD_TARGET、SWCLK、GND、SWDIO、NRST，第 6 位依 UM2324 表 6 为 SWO/保留位）。本页渲染 MCUID 数据档案：八个连接器共 118 个触点、焊桥默认状态，以及每个已发布字段与其固定来源。ST-LINK 的 USB 口 CN2 属供电/调试接口而非扩展排针，不进触点表——其 5V_ST_LINK 电源轨与 CN10-8 的 5V_USB_CHG 是两回事。

76 个 morpho 触点是如何复核的

UM2324 的 morpho 引脚表只以矢量图发布（无文本层），因此本档案改用三源建立：以板卡专属的 C02 原理图（第 5 页文本层，针号与网络名按坐标对齐配对）为裁决来源，以 Zephyr RTOS `st_morpho_connector.dtsi` gpio-map（固定 commit，全部 59 条 GPIO 映射——CN7 26 条 + CN10 33 条）做全量对照，再以 UM2324 Rev 5（表 13 信号标签、表 10 焊桥、电源章节正文）补功能与默认状态。三个来源在全部 59 个 GPIO 位上完全一致——零冲突；原理图标注列对齐有歧义处，由 Zephyr 映射加表 13 的 Arduino 标签裁决配对。

开始开发

芯片事实 — STM32G071RB 芯片页区分芯片本身提供的能力与这块板的接线。
与 F401RE 对比 — NUCLEO-G071RB vs NUCLEO-F401RE 说明两板差异，包括 CN4 命名陷阱。
官方文档 — UM2324 用户手册、MB1360-G071RB-C02 原理图与 STM32G071RB 数据手册，st.com 免费下载。

没有模组层

STM32G071RB 直接焊在板上——没有模组层，兼容模组列表有意留空。

连接器体系速览

CN6 / CN8 / CN5 / CN9 是四组 Arduino Uno V3 单排排针（电源、模拟、数字 1-10、数字 1-8）。能插上 Uno R3 的扩展板就能插上这里。
CN7（公）与 CN10（母） 是 ST morpho 连接器：各 2×19 针，奇数针一排、偶数针另一排，顶面与底面均可接入。Arduino 侧每个信号都在这里，此外还有 Arduino 没有的信号：PC9-PC12、PD0-PD9、PF0/PF1、PB10/PB13/PB15 与 PA12。
CN4 在这块板上不是调试头：它是 ST-LINK 部分的双跳帽 SWD 路由区（默认 ON = 调试板上 MCU；摘掉两个跳帽才能驱动外部目标）。外部 SWD 接线走 CN11 调试口——物理 6 针（VDD_TARGET、SWCLK、GND、SWDIO、NRST，另有第 6 位 SWO/保留；针 5 的 NRST 用于外部调试时 SB19 须为 OFF）。

改变引脚分配的焊桥

A4/A5 选择：默认 SB3/SB4 ON、SB2/SB5 OFF 时，Arduino A4/A5（及 CN7-36/38）接在 PB11/PB12 上——它们带 ADC 通道 IN15/IN16。改焊桥后 A4 经 SB2 改接 PB9、A5 经 SB5 改接 PB8——依 C02 第 5 页（A4/CN8-5/CN7-36 = 默认 PB11 经 SB4、备用 PB9 经 SB2；A5/CN8-6/CN7-38 = 默认 PB12 经 SB3、备用 PB8 经 SB5）。该路由的命名以 C02 原理图加芯片定义为准——PB9 是默认 I²C SDA（Arduino D14）、PB8 是默认 I²C SCL（D15）；UM2324 表 12 把备用名写反——本档案采用 C02/芯片口径，表 12 登记为冲突（这两个脚在本芯片上均无 ADC 通道）。
LSE 与 morpho：SB23/SB24 默认 OFF 使 PC14/PC15 留在 32.768 kHz 晶振上，CN7-25/27 出厂并不连到 PC14/PC15；闭合 SB23/SB24（并移除 R31/R32）才能把它们作为 GPIO 引到 morpho。
HSE：SB25/SB27 默认 ON（R33/R34 不焊），PF0/PF1 作为 GPIO 出现在 CN7-29/31。
USART2 与 ST-LINK 虚拟串口：PA2/PA3（CN10-34/6）直连 morpho 排针；默认 SB16/SB18 ON 时 ST-LINK 虚拟串口额外复用同一条线——排针始终接着，VCP 只是线上的附加载荷。
AREF：SB21 默认 OFF——Arduino AREF 脚（CN5-8）出厂不连 AVDD。
LD4 / B1：用户灯 LD4 由 PA5 驱动（SB22 默认 ON，与 D13/SCK 同线）；用户按键 B1 在 PC13（CN7-23）。

我手上是哪个板卡修订？

PCB 修订丝印为 MB1360-G071RB-C0x。本档案以 ST 发布的 C02 原理图包裁决；本页全部连接器映射都追溯到该修订。若你的板是其它修订字母，请先核对 ST 对应修订的原理图包，再认定 morpho GPIO 映射不变。

又名: NUCLEO-G071RB, STM32 Nucleo-64 G071RB, nucleo-g071rb